Computer Chess Club Archives


Search

Terms

Messages

Subject: Sorry, my mistake!

Author: h.g.muller

Date: 13:28:53 02/07/06

Go up one level in this thread


I guess I misread your previous message, I thought you referred to the variable
latency because of the initial access, but you were talking about the follow
up... :-(

I think it would be a good idea to align the hash table with cache-line
boundaries so that this will not occur. In a 64-byte cache lines you could put
four 16-byte entries, so that a single entrie never straddles a boundary. The
rehashing scheme coud be designed such that you try all 4 entries in that cache
line before trying anything else (or accept a failure):

if(TP[hash].lock==key
   TP[hash^=16].lock==key ||
   TP[hash^=32].lock==key ||
   TP[hash^=16].lock==key)
{/* process hit at TP[hash] */}
else
{/* process miss */}



This page took 0 seconds to execute

Last modified: Thu, 15 Apr 21 08:11:13 -0700

Current Computer Chess Club Forums at Talkchess. This site by Sean Mintz.