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Subject: Re: A Response From Marc Boule

Author: Tom Kerrigan

Date: 00:52:25 04/03/02

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On April 02, 2002 at 13:22:53, Slater Wold wrote:

>I am going on vacation tomorrow for 2 weeks.  When I get back I will profile
>Crafty, and then look into the possibility of porting the heaviest parts into HW
>generated via FPGA's.  It is very possible that I will stick with making the
>move generator first, and then move on to the harder parts.

I don't understand the Crafty fetish.

A hardware implementation of any part of Crafty _should_ be completely different
from its software implementation. As long as you're doing something completely
different, why try to maintain consistency with something arbitrary?

Also, what kind of FPGA are you planning to use, that you're going to implement
an entire eval function? I ask because I believe it would be impossible to fit a
single set (6) of piece-square tables on the largest Virtex, not to mention
actual logic, although I do notice that the Virtex-II Pro has 22592 slices
(!!!). I also bet it costs more than my life's savings...

-Tom



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