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Subject: Re: Question for the Crafty/Compiler experts

Author: Dann Corbit

Date: 13:29:51 02/15/04

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On February 15, 2004 at 16:25:36, Slater Wold wrote:

>On February 15, 2004 at 16:21:56, Dann Corbit wrote:
>
>>On February 15, 2004 at 16:20:48, Slater Wold wrote:
>>
>>>On February 15, 2004 at 16:10:55, Dann Corbit wrote:
>>>
>>>>On February 15, 2004 at 15:45:02, Slater Wold wrote:
>>>>
>>>>>My setup:
>>>>>
>>>>>AMD FX 51
>>>>>Windows 2003 Enterprise (64 bit)
>>>>>Intel 8.0 Compiler
>>>>>
>>>>>
>>>>>Why would compiling Crafty 19.10 be 15% slower when defining /DVC_INLINE_ASM &
>>>>>/DUSE_ASSEMBLY?
>>>>>
>>>>>Has anyone else ever seen that?
>>>>
>>>>It may mean that the compiler generated better assembly than you did.
>>>>
>>>>It may also mean that you pulled in the wrong assembly.  Old x86 assembly will
>>>>run on the AMD opteron type systems.  It is the new stuff that will really be
>>>>snappy.
>>>
>>>ICC doesn't seem to like Bob's assembly code to start off with.
>>>
>>>
>>>vcinline.h(28): warning #1011: missing return statement at end of non-void funct
>>>ion "PopCnt"
>>>  }
>>>  ^
>>>
>>>vcinline.h(41): warning #1011: missing return statement at end of non-void funct
>>>ion "FirstOne"
>>>  }
>>>  ^
>>>
>>>vcinline.h(54): warning #1011: missing return statement at end of non-void funct
>>>ion "LastOne"
>>>  }
>>>  ^
>>
>>Compiler bug.  It does not recall that the return is stored in EAX.
>>
>>Print the rest of the routine that it is crying about.  I am guessing it is
>>pulling in the wrong assembly.
>
>That's the only thing.  I don't know enough about assembly to know what the hell
>is going on.  :)

I don't know where Bob's AMD 64 assembly is.  Probably a .s file, since he uses
GCC (or maybe he is using Intel now -- not sure).

If this is the functions compiled, then it is the wrong stuff:

#ifndef VCINLINE_H_INCLUDED
#define VCINLINE_H_INCLUDED

#if _MSC_VER >= 1200
#define FORCEINLINE __forceinline
#else
#define FORCEINLINE __inline
#endif

FORCEINLINE int PopCnt(BITBOARD a)
{
 /* Because Crafty bitboards are typically sparsely populated, we use a
    streamlined version of the boolean.c algorithm instead of the one in x86.s
*/
  __asm {
                   mov ecx, dword ptr a
                   xor eax, eax
                   test ecx, ecx
                   jz l1
         l0:       lea edx, [ecx - 1]
                   inc eax
                   and ecx, edx
                   jnz l0
         l1:       mov ecx, dword ptr a + 4
                   test ecx, ecx
                   jz l3
         l2:       lea edx,[ecx - 1]
                   inc eax
                   and ecx, edx
                   jnz l2
         l3:}
}

FORCEINLINE int FirstOne(BITBOARD a)
{
  __asm {
                   bsr edx, dword ptr a + 4
                   mov eax, 31
                   jnz l1
                   bsr edx, dword ptr a
                   mov eax, 63
                   jnz l1
                   mov edx, -1
         l1:       sub eax, edx}
}

FORCEINLINE int LastOne(BITBOARD a)
{
  __asm {
                   bsf edx, dword ptr a
                   mov eax, 63
                   jnz l1
                   bsf edx, dword ptr a + 4
                   mov eax, 31
                   jnz l1
                   mov edx, -33
         l1:       sub eax, edx}
}
#endif /* VCINLINE_H_INCLUDED */





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