Author: Robert Hyatt
Date: 07:15:05 01/18/01
Go up one level in this thread
On January 17, 2001 at 10:07:42, Larry Griffiths wrote: >On January 17, 2001 at 00:48:26, Terry McCracken wrote: > >>On January 16, 2001 at 18:49:06, Robert Hyatt wrote: >> >>>On January 15, 2001 at 23:29:42, Larry Griffiths wrote: >>> >>>>On January 15, 2001 at 20:15:17, Ralf Elvsén wrote: >>>> >>>>>I looked ay the instruction set for the Itanium processor. >>>>>As far as I could see there was no instruction to get the first/last >>>>>bit set. >>>>> >>>>>Can someone with insight in processor design describe the >>>>>considerations done by the designers when they decide to >>>>>include or to not include such an instruction? (Assuming they >>>>>are not chess programmers :) >>>>> >>>>>Is it possible to quantify how the "trouble" to include >>>>>it scales with the number of bits? I.e. is it even less likely >>>>>to be found in an 128-bit processor? >>>>> >>>>>Ralf >>>> >>>>I asked this question a while back. >>>> >>>>I think IA32 instructions might still be supported and maybe the BSF BSR >>>>instructions are still available. >>>> >>>>Maybe you can verify this. >>>> >>>>Larry. >>> >>> >>>I actually think that they are not supported if I recall Eugene's comments >>>correctly. It is possible to find which byte is non-zero in a 64 bit word, >>>but I think it then requires a 256-entry table look-up to find the set bit. >> >> >> >>http://www.intel.com/eBusiness/products/ia64/faqs/ > >Again, this seems to indicate binary compatablility with IA32 instructions >Terry, but I am still wondering if you have to be in some sort of IA32 mode or >if you can just execute the instructions while in IA32 mode. Intel has always >maintained hardware instruction compatability with previous generations and I >would hope that IA32 code could use IA64 instructions and registers without >doing some sort of mode switch or incurring clock cycle penalties. > >Larry. Also, don't forget that "binary compatibility" can mean almost anything. IE it is possible that a BSF might generate a trap and end up in some operating system code that emulates the BSF. That would be unusable in a chess engine as it would be _way_ too slow...
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