Author: Vincent Diepeveen
Date: 13:12:41 01/22/01
Go up one level in this thread
On January 22, 2001 at 09:52:01, Robert Hyatt wrote: >On January 22, 2001 at 03:10:18, Gregor Overney wrote: > >> >>Well, good news. Does this mean I can finally buy a system with a 21364? So far, >>all that Compaq is willing to deliver is still based on the 21264. At least four >>months ago that was the music. >> >>The 21464 sounds like Intel's IA-64 - > it will take a very long time until it >>hits the market. >> >>It is also a surprise to me that Compaq continues to push this technology after >>loosing most of its top chip designers to AMD. The 21264 was the last design >>Digital's excellent group developed. >> >>Why does the 21464 chip design try to execute up to eight instructions >>simultaneously. Don't they know that the more instructions are executed >>simultaneously the less they can clock their CPU? See Pentium IV vs. Pentium III >>as an example. - Are they using high-T(c)'s for it? I don't think so. >> >>Gregor >> > > >why would you conclude that more instructions per cycle slows the cycle >down? Because the Intel does it? Different animals. Pentium = 64 bit >bus. Alpha=256. With much higher memory bandwidth to boot.. The more instructions a clock you do the bigger the problem is when you have a lot of branches in the program as currently processors need to reload all the instructions. I guess gregor is referring to that where on the PIII/PII it can execute 3 instructions a clock you have a 10 penalty for each misprediction With P4 which can issue 4 on paper (in reality it has problems which should prevent it from executing 4 simple integer instructions a clock) but already has a branch misprediction penalty of 20 clocks which is hell of a lot. Alpha 21264 can do 4 instructions a clock (which IMHO is its most important advantage to for example a K7) and its penalty for mispredictions will be a real big problem for non-bitboard oriented chessprograms, despite a superb approach for the way in which the branches get predicted. 21164 appeared to be a big bummer for my program too when i finally could run at it and compare it with a PII :) Anyway I wonder how they are going to solve that problem with 8 instructions a clock, because at a certain time bigger branch misprediction penalties are going to be a too big bottleneck for nearly *any* realtime program. Sounds to like me we need to wait another 10 years for that CPU! At that time we won't look very shocked when someone announces a cpu of 8 instructions a clock perhaps. I have the kind of feeling that the improved P4 processor (so not the current release) might be outgunning a lot of cpu's on integer calculation (not FPU). >>>found at : http://www.aceshardware.com/ >>> >>> >>>The more you read about the Alpha 21464 (EV8), the more impressed you are. >>>Grandmaster Paul De Mone has published >>> his third part of the EV8 series: >>> >>> The Compaq Alpha 21464, or EV8, is a superscalar RISC processor >>>currently under development that can nominally issue and execute up to eight >>> instructions per clock cycle. It will likely have the ability to >>>overlap the out-of-order execution of well over a hundred (possibly two hundred) >>> instructions at any given instant. >>> >>> Read more here... >>>http://www.realworldtech.com/page.cfm?ArticleID=RWT011601000000 >>> >>> >>> >>>well, well, well .... I run the 100 meters way faster than this speedlight >>>processor ... ;))))
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