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Subject: Re: Wanted: Deep Blue vs. today's top programs recap (more comments)

Author: Robert Hyatt

Date: 13:19:17 08/27/01

Go up one level in this thread


On August 27, 2001 at 14:53:10, Tom Kerrigan wrote:

>On August 27, 2001 at 14:21:41, Robert Hyatt wrote:
>
>>On August 27, 2001 at 13:47:27, Tom Kerrigan wrote:
>>
>>>On August 27, 2001 at 13:35:13, Robert Hyatt wrote:
>>>
>>>>On August 27, 2001 at 08:59:00, Robert Hyatt wrote:
>>>>
>>>>>On August 27, 2001 at 04:14:33, Tom Kerrigan wrote:
>>>>>
>>>>>>There are some issues here that have not received due attention.
>>>>>>
>>>>>>First, [as most of you already know,] part of DB's search algorithms and all of
>>>>>>DB's evaluation function algorithms were implemented in custom VLSI chips. This
>>>>>>made it phenominally fast and also means that it can't exist as a PC program
>>>>>>(because you don't have the chips). However, PCs have general purpose
>>>>>>processors, which means they can run any algorithm you can think of, so the idea
>>>>>>of running DB on a PC isn't quite as stupid as most people seem to think, if
>>>>>>you're talking about the algorithms. There are two issues at play when
>>>>>>discussing implementing DB as PC software:
>>>>>>
>>>>>>1) Work involved. Speaking from experience, the time-consuming part of writing
>>>>>>an evaluation function is not the actual coding, but instead deciding which
>>>>>>terms to include and what their weights should be. If you already know _exactly_
>>>>>>what an evaluation function is supposed to do, (and the DB team does,) I bet
>>>>>>implementing even the most complicated one would only take a couple of weeks.
>>>>
>>>>I missed that statement first time around, until someone sent me email.  I
>>>>don't know what kind of evaluation _you_ have written.  But _mine_ was not a
>>>>two week implementation project.  None of mine have been two week projects.
>>>
>>>Sounds like you're accounting for development time. Are you saying that, given a
>>>list of Crafty's evaluation terms and their weights, you could not reproduce the
>>>function in two weeks? I bet I could.
>>
>>I would have no chance, no.  Just the code to recognize blocked pawns, levers,
>
>Differing opinions. You (or at least I) can write a _lot_ of code in 80 hours if
>I already know _exactly_ what it's supposed to do. (Notice that I'm not talking
>about perfectly optimized code, which wouldn't be necessary. No amount of
>stupidity could get an evaluation function down to 200 NPS on today's PCs, which
>is what you get with your made-up 1Mx slower figure.)

Just because I know exactly _what_ a piece of code should do does not mean I
know exactly _how_ it should do that.  Probably nobody does the pawn lever
stuff like I do, because of the bitmap stuff I have gotten used to.  But the
current approach took several rewrites to get something that worked acceptably
and performed acceptably.  I'd bet that if I describe what it does, you would
think about it a _long_ time before committing it to code.  Because it took me
a long time to figure how _how_ to do it after I knew what "it" was.




>
>>>>You are behind times.  First, ASICS don't cost "millions of dollars".  Just read
>>>>some of Hsu's old papers.  The first run of the Deep Thought chips cost them
>>>>a couple of thousand dollars, total.  And second, it didn't take "years".
>>>
>>>Well, duh. Weren't they using some 4 micron student process? That's worse than
>>>apples and oranges.
>>
>>MOSIS wasn't a "student process".  In 1986 when they did the first batch,
>>4micron was probably 'current'.  And that is _still_ the beauty of ASICS
>>today.  They are not ridiculously expensive as designing/fabbing a new CPU
>>turns out to be.
>
>If I were talking about a new CPU, I would have said billions of dollars. Big
>difference. It does cost hundreds of thousands of dollars per spin to create an
>ASIC with a reasonably modern process, and doing multiple spins is not out of
>the ordinary. (Just read any interview with a graphics chip designer.) As for
>feature size, 4 micron was current in the 70s, not the lateish 80s. And where
>did Hsu fab the chip? I thought one of the amazing qualities of Hsu's design
>supposedly was that he got it all to fit on one chip using a completely
>out-of-date process.


He fabbed it a project MOSIS.  I believe that was somewhere on the west coast,
funded by NSF, to provide a reasonably state-of-the-art fab facility for those
doing research sponsored by NSF.  15 years ago I could have told you a lot more
about it.  Because we were using it to fab some stuff when I was back in
hattiesburg (unrelated to chess).  I no longer recall any details, other than
they used a decent silicon compiler process so getting the chip design to them
was not a huge error-prone process...





>
>>>>After
>>>>the first Kasparov match, Hsu took time off, then completely re-designed the
>>>>chips to create the DB2 version, had the chips fabbed, and had everything
>>>>working for the  match one year later.  Design, implementation, fab, testing,
>>>>assembly, tuning, all in under one year.  With all the design and testing done
>>>>by one person.
>>>
>>>Okay, so me saying "months" was accurate. And are you trying to imply that one
>>>year of work is trivial? That Hsu would spend an entire year blindly
>>>implementing algorithms that he jus' figgered were good?
>>
>>That's what he said, yes.  And he didn't spend a year, as I mentioned.  There
>
>So he freely admits that he spent significant effort and money (not even his own
>money, either) implementing algorithms that he didn't even pretend to test or
>even experiment with? Unless you're just making this up, my opinion of the
>project is now way lower.
>
>-Tom


I'm making it up.  I do it all the time.  Never any factual information in
the things I write, just wild speculation and nonsense.  Of course, you _could_
just email him and ask about all this nonsense I mention.  And of course, major
chip manufacturers have _never_ sold chips with unused circuits on them.  Unless
you count Zilog and the old Z80, and then Intel.  And Motorola.  Most vendors
have shipped chips with non-described opcodes that worked on some chips, but
not on all.  Because they didn't have time to test them, or later decided that
they were not needed.  Or they would delay the announcement of them to the next
generation to make the gap larger.  Etc.

They ran out of time.  Nothing wrong with shooting for the moon, but having
to settle for a low-earth orbit this year.  They didn't _know_ that 1997 would
be the "end".  It certainly could have ended up differently and they would
have been back in 1998 with most everything working that time around.  In that
simple light, adding enough hardware to do everything they could think of made
perfect sense.  For all they knew there might be several more years of
challenges.  One new chip sounds much better than one new one every year.
Unless, of course, the unthinkable happens and the second generation is good
enough to end it all immediately, as actually happened.

I don't see (a) why this sounds bad  (b) why this would lower your opinion
(c) or why you would even make such a statement.  My opinion just went down
another notch too.  Because I _understand_ what they were doing, why they did
it, and _some_ of the reasons for what they did.  I prefer to spend time trying
to understand the various things they did, rather than to spend time trying
to find fault with them...

I have no trouble walking around with my head up, even though I know their
"thing" was better than my "thing". (to use bruce's term).  I can live in that
world.  You have to also...



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