Author: Bo Persson
Date: 10:31:20 06/24/02
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On June 24, 2002 at 10:30:26, Robert Henry Durrett wrote: >This addresses half the problem. What if the microprocessor wishes to WRITE >something. Why not write it directly to a huge cache and bypass RAM entirely? It does, sort of. The processor writes to the cache, which will update the RAM *eventually*. The processor doesn't have to wait for the update, so if you're lucky you will not see the delay. Current processors even have write-buffers queueing data going to the cache... >If you had extremely large caches, couldn't RAM be dispensed with entirely? Or, if you had fast enough RAM, caches could be dispensed of. :-) That was actually the case for micros until about 15 years ago, when caches were introduced alongside the "extremely" fast 486. A couple of years before that, 120 ns RAM matched an 8 MHz 286 processor pretty well. > >Bob D.
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