Author: Sune Fischer
Date: 14:39:21 03/23/02
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On March 23, 2002 at 17:21:10, Slater Wold wrote: >On March 23, 2002 at 17:07:53, Sune Fischer wrote: > >>On March 23, 2002 at 15:58:19, Tom Kerrigan wrote: >> >>>On March 23, 2002 at 09:53:13, Dan Andersson wrote: >>> >>>>As seen in: >>>>http://www.aceshardware.com/read.jsp?id=45000312 >>>>A chess program using traditional work scheduling algorithms will not be using >>>>the Hammer architecture at its most effective. But it won't be all that bad due >>>>to the HyperTransport tunnels. And high bandwidth memory. A funny consequence of >>>>the architecture is that SMP multiprocessing is achieved by having software >>>>drivers. >>> >>>I don't know what you mean by "traditional work scheduling algorithms" but the >>>Hammer will be great for running chess programs out of the box. The only way to >>>make it faster would be to recompile the programs for x86-64, which reportedly >>>yields a 10-15% performance gain. >> >>The Hammer is a 64-bit chip, I expect it to bring a lot more than just 10-15% in >>chess, more like 100-150% for those progs with bitboards. >> >>-S. > >You're dreaming. Alpha's don't get *anywhere* near that kind of gain. More >like the 10-15% that Tom said. I don't think so, depends on the program obviously, but the parts that use 64 vars will speed up by 2-300% (in theory), on average who can say, but double speed is not unrealistic I think. Just think of FirstBit() and PopCount(), I'm sure they too can be speed up quite a bit, and those are _extensively_ used in most of the codes I've looked at, incl. my own. -S. >> >>>-Tom
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