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Subject: Re: OT: P4- 3 GHz with hyper-threading

Author: Gian-Carlo Pascutto

Date: 12:58:09 11/04/02

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On November 04, 2002 at 11:32:53, Robert Hyatt wrote:

>>If it spends 20% of it's time for this (a realistic number
>>on a high end P4) and the parallel speedup is 1.7 then it
>>is going to run about 5% faster with SMT, roughly.
>
>Where does that "math" come from?  (5%)

Assuming the speedup comes from that 20% waiting time that
can be eliminated, and your parallel efficiency is 1.7, I
do 1.20*(1.70/2) and arrive at a speedup of eh, 2%.
(I realize this is quite fuzzy math)

>I have seen a 30% improvement
>in NPS using hyper-threading on a 2.2ghz PIV.  That should translate into
>a roughly 20% improvement in search speed to a specific depth.  That seemed
>to be close to the numbers Eugene posted as well.

Why is it so much? Is Crafty so memory-bound?

>Once I have time to fiddle with the locks to add the pause, I expect even >better performance...

I use this, works fine with Intel C

__inline void Lock (volatile int *hPtr)
{
    __asm
      {
        mov     ecx, hPtr
   la:  mov     eax, 1
        xchg    eax, [ecx]
        test    eax, eax
        jz      end
   lb:  pause
	mov     eax, [ecx]
        test    eax, eax
        jz      la
        jmp     lb
   end:
}

--
GCP



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