Author: Jeremiah Penery
Date: 21:33:09 07/07/03
Go up one level in this thread
On July 07, 2003 at 23:33:48, Robert Hyatt wrote: >On July 07, 2003 at 11:30:34, Vincent Diepeveen wrote: >>The total bandwidth a 256 node machine with bricks of 4 processors will have >>then a total bandwidth of somewhere around: 12.4 Terabyte a second. >> >>Now *that* is very impressive. > >And imaginary I'll bet. Cray is supposed to be building a 10k processor Opteron supercomputer for Sandia Labs. Its total aggregate bandwidth should far exceed 12.4TB/sec. >>Especially for the price they will deliver it for. >> >>A 5000 processor vector machine now costs around 700 million dollar. > >Where can you find a "5000 processor vector machine?" > >I know where there is a 32 processor vector machine. Nothing beyond >that that I know of, unless you start counting I860 type boxes. NEC Earth Simulator has 5120 NEC SX-7(?) vector processors. Total cost was less than $400m. Here is a blurb about the chip, from the webpage: "Each AP consists of a 4-way super-scalar unit (SU), a vector unit (VU), and main memory access control unit on a single LSI chip. The AP operates at a clock frequency of 500MHz with some circuits operating at 1GHz. Each SU is a super-scalar processor with 64KB instruction caches, 64KB data caches, and 128 general-purpose scalar registers. Branch prediction, data prefetching and out-of-order instruction execution are all employed. Each VU has 72 vector registers, each of which can has 256 vector elements, along with 8 sets of six different types of vector pipelines: addition/shifting, multiplication, division, logical operations, masking, and load/store. The same type of vector pipelines works together by a single vector instruction and pipelines of different types can operate concurrently." Each chip consumes only about 140W, rather than Vincent's assertion of 150KW.
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