Author: Robert Hyatt
Date: 18:12:52 12/17/99
Go up one level in this thread
On December 17, 1999 at 18:14:27, Greg Lindahl wrote: >On December 17, 1999 at 12:15:04, Robert Hyatt wrote: > >>On December 17, 1999 at 00:36:08, Greg Lindahl wrote: >> >>>On December 16, 1999 at 21:08:16, Robert Hyatt wrote: >>> >>>>But you are going about it wrong. First step: enumerate _all_ the problems >>>>that have to be solved... >>> >>>And then you go on to wonder why on earth I feel that I have been personally >>>attacked? I am "naieve" (over something I didn't propose) and "going about it >>>all wrong" (for asking "who's interested?"). Heck, I'm trained as a scientist >>>and I'm quite used to blunt discussions, but this is a bit much. >>> >> >>First _I_ didn't say "naive". Second, I didn't say you are "going about it >>all wrong". > >Someone else said "naive". What you said is quoted above, for all to read. > It certainly is. I specifically said "you are going about it wrong". And "it" is not the FPGA approach... it is about your not wanting to understand the serious problems ahead, _first_. You don't have a clue about how a chess engine works. That is a good recipe for disaster. Because you can't build something if you don't have any idea how it works... I have been trying to explain some of the issues that have to be solved. You continue to take them as personal attacks. >> I pointed >>out some serious issues that _must_ be solved for this to fly. > >Incorrect. If the FPGA design doesn't need any memory, then no one needs to >solve the problem of getting memory in an FPGA. You pointed out a straw man. No, _you_ are incorrect. The chess engine _must_ have memory. There is _no_ evaluation that works as a finite state automaton. There is no way to represent alpha/beta as a finite state automaton. So a pure FPGA design isn't going to work. Which was my original, _and_ present point. You originally said you wanted to do the eval in an FPGA design. That is no good. At the very best, you can speed up a chess engine by a factor of 2-3, assuming that they use 2/3 of the compute cycles in the eval. This isn't true for many programs. And a factor of 2-3 for all the hardware work isn't worth the effort. Just wait 2 years and the factor of 2-3 will be here via faster cpus. DB proved that to make the thing fly, the _entire_ engine. Search, move generator, make/unmake, repetition check, evaluation, move ordering, etc. _all_ has to be done in the hardware, to get enough of a speed advantage to make this worthwhile. > >>Certainly... But you started with the idea of a single-chip engine. > >I did not. You act as if my mention of some technology issues was like I had >decreed a design. That's the very straw man you continue to talk about. If >you're going to discuss a straw man, quit claiming I proposed it. > >This point is not very complex. I'm surprised you continue to post again and >again about it. > >-- greg I'm not going to post again about it. You have a psychological problem about taking _every_ comment as a personal attack. Every response you have gotten was treated the same way... I'm glad this didn't get off the ground with me involved, because I can't work like that. Good luck, as I'd love to see something hardware-ish work. But if you don't get rid of the paranoia, the pig isn't going to fly... Now, I'm going back to work on making _my_ pig fly...
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