Author: Robert Hyatt
Date: 09:15:04 12/17/99
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On December 17, 1999 at 00:36:08, Greg Lindahl wrote: >On December 16, 1999 at 21:08:16, Robert Hyatt wrote: > >>But you are going about it wrong. First step: enumerate _all_ the problems >>that have to be solved... > >And then you go on to wonder why on earth I feel that I have been personally >attacked? I am "naieve" (over something I didn't propose) and "going about it >all wrong" (for asking "who's interested?"). Heck, I'm trained as a scientist >and I'm quite used to blunt discussions, but this is a bit much. > First _I_ didn't say "naive". Second, I didn't say you are "going about it all wrong". That is a strawman argument that _you_ have constructed, to use your favorite term. I didn't say _anything_ was being done wrong. I pointed out some serious issues that _must_ be solved for this to fly. If you feel that is personal, you are simply mis-reading. However, it is pretty obvious to me that I wouldn't be able to work with you as you are far too sensitive and take everything personal. If I behaved like this Crafty would have died four years ago as lots of people point out its shortcomings all the time. Rather than taking it personal, I fix 'em. Or sometimes explain why I can't... >BTW, I can't enumerate all the problems, because I have no idea what they are. >I'm on step 0 of the process, and you want to be on step 1. This was exactly what I tried to do... enumerate the serious problems that have to be solved _first_. However it turns out that the more serious problem is one of communication and personalities... > >Also BTW, the FPGA problem you (and others) recount is probably why most FPGA >PCI cards come with sram on the card. Certainly... But you started with the idea of a single-chip engine. It isn't going to be single-chip. The speed of hardware chess engines comes from parallel operations internally, such as evaluating pawns in 8 pieces, one for each file. If you can't pass data around inside the chip easily, then that is going to hurt. The design may well end back up where Belle was... lots of FPGA's, one for each parallel component, interconnected by other FPGA's to pass data, with memory scattered around. Re-doing Belle isn't going to be anywhere near DB's speed. And it isn't going to fit on a single PCI card unless some of these issues can be solved... > >>IE if I am going to build a robot to perform surgery, I am _definitely_ going to >>listen to a MD that explains certain very tedius things that must be done right, > >Which is why I asked who was interested in the problem. It's a simple question. >I'm in private discussions with a couple of people about this project, and I >assure you that I'm listening very carefully, and find what they have to say >very educational. I would probably find what you have to say useful, if you >wanted to talk about something other than the straw-man entire-algorithm- >on-fpga approach, which I doubt fits the resources of anyone but IBM. > >-- greg I didn't bring up the single-FPGA idea. But I have a pretty good idea of what has to be done to put it on a single PCI-sized card. It isn't going to be easy. And if someone doesn't know what Thompson/Hsu did, it is going to be _very_ expensive and take a long time to produce. There are lots of pitfalls they found along the way...
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